John Taylor, Professor of Economics at Stanford University and developer of the "Taylor Rule" for setting interest rates | Stanford University
John Taylor, Professor of Economics at Stanford University and developer of the "Taylor Rule" for setting interest rates | Stanford University
The U.S. Department of Commerce is making strides in semiconductor research through the CHIPS and Science Act, a legislative measure passed in 2022. This act allocates $52 billion to boost the semiconductor sector, aiming to revitalize American investment in this crucial technology. The National Semiconductor Technology Center (NSTC) has been established as part of this initiative, bringing together academia, industry, government, and nonprofits to advance research and development.
Stanford University recently joined the NSTC as an academic institution engaged in semiconductor-related research. H.-S. Philip Wong, a professor at Stanford's School of Engineering, discussed the significance of this membership with Stanford Report. "The semiconductor is a foundational technology that underpins many technological advances," he noted, emphasizing its importance for economic development and national security.
Wong highlighted how the pandemic underscored the need for a secure chip supply chain: "We’ve seen that during the pandemic – the lack of chips brought the auto industry to a grinding halt." He stressed collaboration with allies and robust domestic manufacturing as key strategies.
Stanford has long played a pivotal role in semiconductor research. Wong explained that before the 1980s, individual professors required their own facilities for chip research. However, Stanford pioneered shared facilities that reduced costs and fostered collaboration among researchers. These include the Stanford Nanofabrication Facility and Stanford Nano Shared Facilities.
The NSTC membership offers significant benefits for Stanford by providing access to sponsored research grants and collaborative opportunities within its community. The NSTC plans to establish three main facilities; two have been announced so far: one in New York focusing on lithography services and another in Sunnyvale, California serving as administrative headquarters with a design research center.
Discussing future advancements in chip technology, Wong mentioned efforts towards developing three-dimensional chips: "Instead of cramming more into a single-story house," he said metaphorically about current chip designs, "build taller buildings." Such innovations could enhance energy efficiency significantly—crucial for applications like AI model training—and improve functionality over existing technologies.
Wong concluded by noting how advancements have enabled modern phones to perform tasks unimaginable just ten years ago due to improvements in chip technology.